hardware · Verilog

Enhanced 8-Bit CPUshipped

A from-scratch processor in Verilog.

A synthesizable 8-bit Harvard CPU with multi-level caches and a 16×16 systolic array accelerator.

A synthesizable Harvard-architecture CPU with separate instruction/data memory, an L1/L2/L3 cache hierarchy, and a systolic-array accelerator for AI/ML workloads, plus a full toolchain (assembler, test suite, performance analyzer) and example programs.